vishay siliconix si7469dp document number: 73438 s09-0271-rev. c, 16-feb-09 www.vishay.com 1 p-channel 80-v (d-s) mosfet features ? halogen-free according to iec 61249-2-21 available ? trenchfet ? power mosfet product summary v ds (v) r ds(on) ( ) i d (a) a q g (typ.) - 80 0.025 at v gs = - 10 v - 28 55 nc 0.029 at v gs = - 4.5 v - 28 ordering information: SI7469DP-T1-E3 (lead (pb)-free) si7469dp-t1-ge3 (lead (pb)-free and halogen-free) 1 2 3 4 5 6 7 8 s s s g d d d d 6.15 mm 5.15 mm powerpak so-8 bottom view s g d p-channel mosfet notes: a. package limited. b. surface mounted on 1" x 1" fr4 board. c. t = 10 s. d. see solder profile ( www.vishay.com/ppg?73257 ). the powerpak so-8 is a leadless package. the end of the lead terminal is exposed copper (not plated) as a result of the singulatio n process in manufacturing. a solder fill et at the exposed copper tip cannot be guara nteed and is not required to ensure adequate botto m side solder interconnection. e. rework conditions: manual soldering with a sol dering iron is not recommended for leadless components. f. maximum under steady state conditions is 65 c/w. absolute maximum ratings t a = 25 c, unless otherwise noted parameter symbol limit unit drain-source voltage v ds - 80 v gate-source voltage v gs 20 continuous drain current (t j = 150 c) t c = 25 c i d - 28 a a t c = 70 c - 28 a t a = 25 c - 10.2 b, c t a = 70 c - 8.1 b, c pulsed drain current i dm - 40 continuous source-drain diode current t c = 25 c i s - 28 a t a = 25 c - 4.3 b, c avalanche current l = 0.1 mh i as - 45 single-pulse avalanche energy e as 100 mj maximum power dissipation t c = 25 c p d 83 w t c = 70 c 53 t a = 25 c 5.2 b, c t a = 70 c 3.3 b, c operating junction and storage temperature range t j , t stg - 55 to 150 c soldering recommendations (peak temperature) d, e 260 thermal resistance ratings parameter symbol typical maximum unit maximum junction-to-ambient b, f t 10 s r thja 19 24 c/w maximum junction-to-case (drain) steady state r thjc 1.2 1.5
www.vishay.com 2 document number: 73438 s09-0271-rev. c, 16-feb-09 vishay siliconix si7469dp notes: a. pulse test; pulse width 300 s, duty cycle 2 %. b. guaranteed by design, not s ubject to production testing. stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. specifications t j = 25 c, unless otherwise noted parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = - 250 a - 80 v v ds temperature coefficient v ds /t j i d = - 250 a - 79.6 mv/c v gs(th) temperature coefficient v gs(th) /t j 5.3 gate-source threshold voltage v gs(th) v ds = v gs , i d = - 250 a - 1 - 3 v gate-source leakage i gss v ds = 0 v, v gs = 20 v 100 na zero gate voltage drain current i dss v ds = - 80 v, v gs = 0 v - 1 a v ds = - 80 v, v gs = 0 v, t j = 55 c - 10 on-state drain current a i d(on) v ds 5 v, v gs = - 10 v - 40 a drain-source on-state resistance a r ds(on) v gs = - 10 v, i d = - 10.2 a 0.021 0.025 v gs = - 4.5 v, i d = - 8.1 a 0.024 0.029 forward transconductance a g fs v ds = - 15 v, i d = - 10.2 a 52 s dynamic b input capacitance c iss v ds = - 40 v, v gs = 0 v, f = 1 mhz 4700 pf output capacitance c oss 320 reverse transfer capacitance c rss 235 total gate charge q g v ds = - 40 v, v gs = - 10 v, i d = - 10.2 a 105 160 nc v ds = - 40 v, v gs = - 4.5 v, i d = - 10.2 a 55 85 gate-source charge q gs 16 gate-drain charge q gd 26 gate resistance r g f = 1 mhz 4 tu r n - o n d e l ay t i m e t d(on) v dd = - 40 v, r l = 4.9 i d ? - 8.1 a, v gen = - 10 v, r g = 1 45 70 ns rise time t r 220 330 turn-off delay time t d(off) 95 145 fall time t f 110 165 tu r n - o n d e l ay t i m e t d(on) v dd = - 40 v, r l = 4.9 i d ? - 8.1 a, v gen = - 4.5 v, r g = 1 15 25 ns rise time t r 25 40 turn-off delay time t d(off) 105 160 fall time t f 100 150 drain-source body diode characteristics continuous source-drain diode current i s t c = 25 c - 28 a pulse diode forward current a i sm - 40 body diode voltage v sd i s = - 8.1 a - 0.8 - 1.2 v body diode reverse recovery time t rr i f = - 8.1 a, di/dt = 100 a/s, t j = 25 c 55 85 ns body diode reverse recovery charge q rr 110 165 nc reverse recovery fall time t a 37 ns reverse recovery rise time t b 18
document number: 73438 s09-0271-rev. c, 16-feb-09 www.vishay.com 3 vishay siliconix si7469dp typical characteristics 25 c, unless otherwise noted output characteristics on-resistance vs. drain current and gate voltage gate charge 0 5 10 15 20 25 30 35 40 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v gs = 10 v thru 4 v 3 v v ds - drain-to-source voltage (v) i d - drain current (a) 0.020 0.021 0.022 0.023 0.024 0.025 0.026 0 5 10 15 20 25 30 35 40 v gs = 10 v i d - drain current (a) v gs = 4.5 v r ds(on) - on-resistance ( ) 0 2 4 6 8 10 0 20406080100120 i d = 10.2 a - gate-to-source voltage (v) q g - total gate charge (nc) v gs v ds = 64 v v ds = 40 v transfer characteristics capacitance on-resistance vs. junction temperature 0 4 8 12 16 20 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 25 c t a = 125 c v gs - gate-to-source voltage (v) i d - drain current (a) - 55 c 0 1000 2000 3000 4000 5000 6000 7000 8000 0 1020304050607080 c oss c iss v ds - drain-to-source voltage (v) c - capacitance (pf) c rss 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 - 50 - 25 0 25 50 75 100 125 150 v gs = 10 v t j - junction temperature (c) r ds(on) - on-resistance (normalized) i d = 10.2 a v gs = 4.5 v
www.vishay.com 4 document number: 73438 s09-0271-rev. c, 16-feb-09 vishay siliconix si7469dp typical characteristics 25 c, unless otherwise noted source-drain diode forward voltage threshold voltage 1.0 1.2 1 10 40 0.00 0.2 0.4 0.6 0.8 t j = 25 c t j = 150 c v sd - source-to-drain voltage (v) i s - source current (a) 1.2 1.4 1.6 1.8 2.0 2.2 2.4 - 50 - 25 0 25 50 75 100 125 150 i d = 250 a t j - temperature (c) v gs(th) (v) on-resistance vs. gate-to-source voltage single pulse power, junction-to-ambient 0.01 0.02 0.03 0.04 0.05 2345678910 v gs - gate-to-source voltage (v) r ds(on) - drain-to-source on-resistance ( ) t a = 25 c t a = 125 c 0 20 35 5 10 power (w) time (s) 25 15 30 0.01 0.1 1 10 100 1000 safe operating area, junction-to-ambient 100 1 0.1 1 10 1000 0.001 10 i d - drain current (a) 0.1 v ds - drain-to-source voltage (v) * v gs > minimum v gs at which r ds(on) is specified 0.01 100 1 ms 10 ms 100 ms dc 1 s 10 s t a = 25 c single pulse 100 s limited by r ds(on) *
document number: 73438 s09-0271-rev. c, 16-feb-09 www.vishay.com 5 vishay siliconix si7469dp typical characteristics 25 c, unless otherwise noted * the power dissipation p d is based on t j(max) = 150 c, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. it is used to determine the current rating, when this rating falls below the package limit. current derating* single pulse avalanche capability 0 10 20 30 40 50 0 25 50 75 100 125 150 i d - drain current (a) t c - case temperature (c) package limited 100 0.000001 0.0001 0.01 1 10 0.00001 t a - time in avalanche (s) i c - peak avalanche current (a) t a = l . i d bv - v dd 0.001 power derating 0 20 40 60 80 100 25 50 75 100 125 150 t c - case temperature (c) power (w)
www.vishay.com 6 document number: 73438 s09-0271-rev. c, 16-feb-09 vishay siliconix si7469dp typical characteristics 25 c, unless otherwise noted vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?73438 . normalized thermal transient im pedance, junction-to-ambient 10 -2 1 10 1000 10 -1 100 2 1 0.1 0.01 0.2 0.1 0.05 0.02 single pulse duty cycle = 0.5 square wave pulse duration (s) normalized effective transient thermal impedance 1. duty cycle, d = 2. per unit base = r thja = 65 c/w 3. t jm - t a = p dm z thja (t) t 1 t 2 t 1 t 2 notes: 4. surface mounted p dm normalized thermal transient impedance, junction-to-case 10 -3 10 -2 1 10 -1 10 -4 2 1 0.1 0.01 0.2 0.1 0.05 0.02 single pulse duty cycle = 0.5 square wave pulse duration (s) normalized effective transient thermal impedance
package information www.vishay.com vishay siliconix revison: 20-may-13 1 document number: 71655 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 powerpak ? so-8, (single/dual) millimeters inches dim. min. nom. max. min. nom. max. a 0.97 1.04 1.12 0.038 0.041 0.044 a1 - 0.05 0 - 0.002 b 0.33 0.41 0.51 0.013 0.016 0.020 c 0.23 0.28 0.33 0.009 0.011 0.013 d 5.05 5.15 5.26 0.199 0.203 0.207 d1 4.80 4.90 5.00 0.189 0.193 0.197 d2 3.56 3.76 3.91 0.140 0.148 0.154 d3 1.32 1.50 1.68 0.052 0.059 0.066 d4 0.57 typ. 0.0225 typ. d5 3.98 typ. 0.157 typ. e 6.05 6.15 6.25 0.238 0.242 0.246 e1 5.79 5.89 5.99 0.228 0.232 0.236 e2 (for al product) 3.30 3.48 3.66 0.130 0.137 0.144 e2 (for other product) 3.48 3.66 3.84 0.137 0.144 0.151 e3 3.68 3.78 3.91 0.145 0.149 0.154 e4 (for al product) 0.58 typ. 0.023 typ. e4 (for other prod uct) 0.75 typ. 0.030 typ. e 1.27 bsc 0.050 bsc k (for al product) 1.45 typ. 0.057 typ. k (for other produc t) 1.27 typ. 0.050 typ. k1 0.56 - - 0.022 - - h 0.51 0.61 0.71 0.020 0.024 0.028 l 0.51 0.61 0.71 0.020 0.024 0.028 l1 0.06 0.13 0.20 0.002 0.005 0.008 ? 0 - 12 0 - 12 w 0.15 0.25 0.36 0.006 0.010 0.014 m 0.125 typ. 0.005 typ. ecn: c13-0702-rev. k, 20-may-13 dwg: 5881 3. dimensions exclusive of mold flash and cutting burrs. 1. notes 2 inch will govern. dimensions exclusive of mold gate burrs. backside view of single pad backside view of dual pad detail z d d1 d2 c a e1 d1 e2 d2 e b 1 2 3 4 h 4 3 2 1 1 2 3 4 b l d2 d3 (2x) z a1 k1 k d e w l1 d5 e3 d4 e4 e4 k l h e2 d4 d5 m e3 2 2
application note 826 vishay siliconix document number: 72599 www.vishay.com revision: 21-jan-08 15 application note recommended minimum pads for powerpak ? so-8 single 0.174 (4.42) recommended mi nimum pads dimensions in inches/(mm) 0.260 (6.61) 0.024 (0.61) 0.154 (3.91) 0.150 (3.81) 0.050 (1.27) 0.050 (1.27) 0.032 (0.82) 0.040 (1.02) 0.026 (0.66) return to index return to index
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